技术论文
Technical Paper | Title | First autor | Submission | Posting | Comment |
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IGBT | High temperature, high power density power semiconductor module for xEV application | K. Yasui | 2020/08 | Engineering Materials September 2020 Issue | Written in Japanese |
New 6.5kV 1000A IGBT Module with Side Gate HiGT | H. Koguchi | 2018/05 | PCIM Europe2018 | ||
An Innovative Silicon Power Device (i-Si) through Time and Space Control of a Stored Carrier (TASC) |
M. Mori | 2018/05 | ISPSD2018 | ||
Dual Side-Gate HiGT Breaking Through the Limitation of IGBT Loss Reduction | T.Miyoshi | 2017/05 | PCIM | ||
A Novel Hybrid Power Module with Dual Side-Gate HiGT and SiC-SBD | Y.Takeuchi | 2017/05 | ISPSD | ||
Side Gate HiGT with Low Loss and Low Noise | 2017/01 | Hitachi Review 2017 Vol.99 No.1 | Written in Japanese | ||
Side Gate HiGT with Low dv/dt Noise and Low Loss | M.Shiraishi | 2016/06 | ISPSD | ||
High Voltage Module with Low Internal Inductance for Next Chip Generation - Next High Power Density Dual (nHPD2) | D.Kawase | 2015/05 | Mesago PCIM 2015 | ||
New 4.5kV IGBT Module with Low Power Loss and High Current Ratings | T.Matsumoto | 2015/05 | Mesago PCIM 2015 | ||
New 1800A/3.3kV IGBT Module Using Advanced Trench HiGT Technoligy and Module Design Optimization | T.Kushima | 2014/05 | Mesago PCIM 2014 | ||
Novel 3.3-kV Advanced Trench HiGT with Low Loss and Low dv/dt Noise | Y.Toyota | 2013/05 | ISPSD | ||
1.7kV Trench IGBT with Deep and Separate Floating p-Layer Designed for Low Loss, Low EMI Noise, and High Reliability | S.Watanabe | 2011/05 | ISPSD |
Technical Paper | Title | First autor | Submission | Posting | Comment |
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SiC | A edge termination with enhanced field-limiting rings insensitive to surface charge for high voltage SiC power devices | T. Hirao | 2020/03 | IEEE Transactions on Electron Devices | |
Low loss technologies of Hitachi's Power Semiconductor Devices | H. Kageyama | 2019/01 | Technical magazine Smart Grid January 2019 issue | Written in Japanese | |
High reliability termination technology for SiC Power Devices | H.Onose | 2016/03 | IEEJ | Written in Japanese | |
Charge Distribution in Termination Area of 4H-SiC Diodes Analyzed by Measuring Depeletion-layer Capacitance (MDC) | H.Matsushima | 2015/09 | SSDM |
Technical Paper | Title | First autor | Submission | Posting | Comment |
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SiC-MOS | High-power Density SiC Power Module (3.3 kV/1,000 A) Using Sintered-copper Die-attach Technology | 2020/01 | “Hitachi Technology 2020: Technology & Innovation Foresights 2020” 2020 vol.120 No.1 |
Written in Japanese | |
SiC Modules for Railway Inverters Able to Operate at High Temperatures | 2020/01 | “Hitachi Technology 2020: Technology & Innovation Foresights 2020” 2020 vol.120 No.1 |
Written in Japanese | ||
Development of 3.3kV High Power Density Full-SiC Power Modules with Sintered Copper Die Attach Technology | K. Yasui | 2019/10 | ISAPP2019 | ||
Diode-less SiC Power Module With Countermeasures Against Bipolar Degradation Achieving Ultrahigh Power Density | T. Ishigaki | 2019/09 | IEEE Transactions on Electron Devices | ||
A 3.3 kV 1000 A High Power Density SiC Power Module with Sintered Copper Die Attach Technology | K. Yasui | 2019/05 | PCIM Europe2019 | ||
Analysis of degradation phenomena in bipolar degradation screening process for SiC-MOSFETs | T. Ishigaki | 2019/05 | ISPSD2019 | ||
1.2-kV SiC trench-etched double-diffused MOS (TED-MOS) for electric vehicle | T. Suto | 2018/09 | ECSCRM | ||
Fabrication and characterization of 3.3-kV SiC DMOSFET with self-aligned channels formed by tilted ion implantation | T. Morikawa | 2018/09 | ECSCRM | ||
Impact of Interface Trap Density of SiC-MOSFET in High-Temperature Environment | S. Sato | 2018/09 | ECSCRM | ||
T. Ishigaki | 2018/05 | PCIM Europe2018 | |||
Robustness improvement of short-circuit capability by SiC trench-etched double-diffused MOS (TED MOS) | N. Tega | 2018/05 | ISPSD2018 | ||
Improvement of Power Cycling Reliability of 3.3kV Full-SiC Power Modules with Sintered Copper Technology for Tj,max=175°C | K. Yasui | 2018/05 | ISPSD2018 | ||
Evaluation of Gate Oxide Reliability in 3.3 kV 4HSiC DMOSFET with J-Ramp TDDB Methods | M. Sagawa | 2018/05 | ISPSD2018 | ||
Analysis of Short-Circuit Break-Down Point in 3.3 kV SiC-MOSFETs | K. Tani | 2018/05 | ISPSD2018 | ||
Switching Reliability of SiC-MOSFETs Containing Expanded Stacking Faults | R.Fujita | 2017/09 | ICSCRM | ||
Channel Properties of SiC Trench-Etched Double-Diffused MOS (TED MOS) | N.Tega | 2016/02 | IEEE Transactions on Electron Devices | ||
Novel Trench-etched Double-diffused SiC MOS (Ted MOS) to overcome tradeoff between RonA and Qgd | N.Tega | 2015/05 | ISPSD | ||
Full-SiC 3.3kV/450A low inductance module; nHPD2 with smooth switching | T.Ishigaki | 2015/05 | Mesago PCIM 2017 |
Technical Paper | Title | First autor | Submission | Posting | Comment |
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SiC-SBD | 3.3KV hybrid module using SiC-SBD | K.Ogawa | 2012/03 | IEEJ | Written in Japanese |
Traction inverter that applies hybrid module using 3-kV SiC-SBDs | K.Ishikawa | 2010/06 | IPEC 2010 | Paper: The 2010 International Power Electronics Conference - ECCE ASIA - (2010) |
Technical Paper | Title | First autor | Submission | Posting | Comment |
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Sintered Copper | High Power Density Side-Gate HiGT Modules with Sintered Cu Having Superior High-Temperature Reliability to Sintered Ag | T.Furukawa | 2017/05 | ISPSD | |
Highly Reliable and Lead-Free High Power IGBT Modules Using Novel Copper Sintering Die attachment | A.Konno | 2016/05 | PCIM | ||
New Bonding Technique Using Copper Oxide Materials | T.Morita | 2014/03 | Materials Transactions |
Technical Paper | Title | First autor | Submission | Posting | Comment |
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Reliability | Improvement of power cycling life in actual operating condition of power semiconductor module by Sn-based solder die bon ding |
Y. Harubeppu | 2020/05 | PCIM Europe2020 | |
Reliability and Failure Modes in Power cycling tests for solder bonding | T. Miyazaki | 2019/01 | MATE2019 | Written in Japanese | |
Reliability Evaluation of Sintered Metal Bonding | A. Konno | 2018/09 | MES2018 | Written in Japanese | |
Study on Vertical Crack Mechanism of Solder | Y. Harubeppu | 2018/09 | JSME M&M Conference 2019 | Written in Japanese | |
Improvement of Power Cycling Reliability of Sn-Cu Based Solder | T.Miyazaki | 2015/07 | IMAPS International Microelectronics Assembly and Packaging Society |
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Study of Heat Transfer Measurement Method of Water-cooled Heatsink | K.Horiuchi | 2015/06 | HTSJ | Lecture | |
High precision thermal resistance measurement technology for Direct Water Cooling Module | K.Horiuchi | 2015/05 | JMA | Lecture, Japanese | |
Fatigue life evaluation of aluminum bonding wire in silicone gel under random vibration testing | K.Sasaki | 2013/09 | Microelectronics Reliability | Contribution Volume 53, Issue 9-11, 2013, pp1766-1770 |
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Effect of Heat Generation on Fatigue-Crack Propagation of Solder in Power Devices | S.Hiramitsu | 2011/07 | ASME InterPACK | Lecture IPACK2011-52247, pp. 345-350 |
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Small size, low thermal resistance and high reliability packaging technologies of IGBT module for wind power applications | K.Sasaki | 2010/05 | PCIM | Lecture |
Technical Paper | Title | First autor | Submission | Posting | Comment |
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Direct Water Cooling | Advanced Direct-water-cool Power Module having Pinfin Heatsink with Low Pressure Drop and High Heat Transfer | K.Horiuchi | 2013/05 | ISPSD2013 |
Technical Paper | Title | First autor | Submission | Posting | Comment |
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High Voltage IC | Low On-Resistance High Voltage Thin Layer SOI LDMOS Transistors with Stepped Field Plates | K.Hara | 2017/05 | ISPSD2017 | |
A New Conpact, Low On Resistace and High Off Isolation High Voltage Analog Switch IC Without Using High Voltage Power Supplies for Ultrasound Imaging System | F.Yamashita | 2016/06 | ISPSD2016 | ||
600V Single Chip Inverter IC with New SOI Technology | K.Hara | 2014/06 | ISPSD2014 |
Technical Paper | Title | First autor | Submission | Posting | Comment |
---|---|---|---|---|---|
Alternator Diodes | Super Low Loss Diode (SLLD) for Automotive Alternator Generators | Y. Senzaki | 2020/05 | PCIM Europe2020 |